Design engineers, service repair technicians, production engineers, students and the like often require a simple tool for testing connections between circuit terminals or pins of devices mounted on a Printed Circuit Board, PCB. Such connection tests can be performed using well-known multimeters to measure the ohmic resistance between the respective circuit terminals. In the case of a galvanic connection, the measured resistance is near zero ohms. Some of the multimeters even provide an acoustic signal to indicate that there is a galvanic connection between measured terminals.
The present miniaturisation of Integrated Circuits, ICs, and the introduction of Surface Mounted Devices, SMDs, on both sides of a PCB, for example, have made it practically impossible to access the circuit terminals by the test probes of a multimeter or a test bed fixture.
However, also in the design of present PCBs there is a genuine need for testing connections between circuit terminals of circuit components mounted on such PCB, in a simple and reliable manner.
Boundary-Scan Test, BST, technology provides a tool for testing connections between components, such as ICs, mounted on a PCB, without using physical test probes or fixtures. In a boundary-scan compliant device, boundary scan cells connect between the circuit terminals and the electronic circuitry of the device, also called the In Core Logic. The boundary-scan cells can force and/or capture data, i.e. digital signals, at the circuit terminals of the device. The boundary-scan cells of a device are series connected to form a boundary-scan register. Boundary-scan registers of boundary-scan compliant devices at a PCB may be series connected to form a single boundary-scan chain or a plurality of boundary-scan chains.
Test Access Ports, TAP, are provided for shifting data in and out of the boundary-scan register and for applying control signals to present data at an output of a boundary-scan cell, to capture data at an input of a boundary-scan cell, and for shifting data through the boundary-scan register.
Several types of boundary-scan cells can be distinguished:                an input cell;        an output2 cell, having two possible logic output states 0 or 1;        an output3 cell; having three possible logic output states 0, 1 and Z (tri-state);        a Bi-directional cell or Input/Output cell,        a dot 4 cell,        a dot 6 cell, and        a control cell for enabling or disabling the driver of an output3 cell or a bidirectional cell.        
A boundary-scan cell operating for capturing data at an associated circuit terminal is also called a sensor and a boundary-scan cell operating for outputting data at an associated circuit terminal of a boundary-scan compliant device is also called a driver.
Boundary-scan test systems are generally comprised of two basic elements: a Test Program Generator, TPG, and the Test Execution, TE. A TPG requires a list describing the connectivity of the PCB, also called net list, and the so-called Boundary-Scan Description Language, BSDL, files of the respective boundary-scan components mounted on the PCB. BSDL enables users to provide a description of the manner in which a particular device is made boundary-scan compliant. The BSDL file is used by the boundary-scan test system to make use of the device features for test program generation and failure diagnosis.
For performing a boundary-scan test, a user has to provide a test plan consisting of various test steps, including the generation of test vectors, i.e. a well defined series of logical 1 en logical 0 bits. Developing such test vectors is time consuming and requires skilled users. Since IC's are getting more and more complex, the test procedures become likewise more complex and take more time to be completed. For a user, looking for a simple and reliable alternative to the above-described multimeter approach for testing connections on a PCB, present regular boundary-scan testing does not provide a genuine alternative.